1. Field of the Invention
The present invention relates to an integrated circuit device. More particularly, it relates to an integrated circuit device suitably applicable to a high speed operation circuit and having stacked conductive layers connecting circuit elements in the device with inductive elements embedded therein.
2. Description of the Related Art
Semiconductor integrated circuit (IC) chips in which a plurality of circuit elements, such as transistors and resistors, are formed in a semiconductor chip of silicon (Si), gallium-arsenic (GaAs), etc., and which, for example, are operable for high-speed, e.g., one giga bits per second, data processing or optical data processing, are known. Such semiconductor IC chips must be hermetically sealed by a package in the same way as for normal semiconductor IC chips.
In high speed IC devices, connection wires (leads) of resistive material between circuit elements in the device, must be regarded as not only resistance components but also as inductance components, due to the application of a high thereon and wires having a low resistance and low inductance are required for high speed signal transfer lines. On the other hand, wires having a high inductance are required for power supply lines and low speed signal transfer lines, to improve isolation between different power sources and between the circuit elements in the device. In high speed IC devices, an impedance matching of the connection wires is also required, and thus wire connection technology as used in well known normal semiconductor IC devices cannot be used. Accordingly, the high speed IC devices are provided with multi-stacked layers, each consisting of a dielectric layer and a plurality of conductive layer strips, and connection members are embedded in the multi-stacked layers in a direction perpendicular to the planes of the stacked layers. The IC chip in which the circuit elements are formed is mounted on the top of the stacked layers and hermetically sealed by the package. The connection of the circuit elements in the IC device is achieved by the connection members and the conductive layer strips of the multi-stacked layers
In the prior art high speed IC devices, however viaholes, which are formed with an electrical conductive material therein forming for the connection members in the stacked layers, are identical in size with the result that the cross-sectional areas of the connection members for high speed signal transfer are identical in size to the connection members of the power supply This discrepancy to the above requirement, that is, low inductance for high speed signal transfer and not necessarily low inductance for power supply and low speed signal transfer, may be acceptable for low speed IC devices, e.g., those carrying signals of lower than one giga bit per second. However, the above discrepancy is not acceptable for high speed IC devices, e.g., these carrying signals of more than several giga bits per second, because, even if each circuit element has a high speed characteristic, a high speed operation of the high speed IC devices cannot be obtained.